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TC55NEM216AFTN55 Fiches technique(PDF) 1 Page - Toshiba Semiconductor |
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TC55NEM216AFTN55 Fiches technique(HTML) 1 Page - Toshiba Semiconductor |
1 / 11 page TC55NEM216AFTN55,70 2002-07-04 1/11 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 262,144-WORD BY 16-BIT FULL CMOS STATIC RAM DESCRIPTION The TC55NEM216AFTN is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by 16 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V ± 10% power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 1 µA standby current (typ) when chip enable ( CE ) is asserted high. There are two control inputs. CE is used to select the device and for data retention control, and output enable ( OE ) provides fast memory access. Data byte control pin ( LB , UB ) provides lower and upper byte access. This device is well suited to various microprocessor system applications where high speed, low power and battery backup are required. And, with a guaranteed operating extreme temperature range of −40° to 85°C, the TC55NEM216AFTN can be used in environments exhibiting extreme temperature conditions. The TC55NEM216AFTN is available in a plastic 54-pin thin-small-outline package (TSOP). FEATURES • Low-power dissipation Operating: 15 mW/MHz (typical) • Single power supply voltage of 5 V ± 10% • Power down features using CE • Data retention supply voltage of 2.0 to 5.5 V • Direct TTL compatibility for all inputs and outputs • Wide operating temperature range of −40° to 85°C • Standby Current (maximum): 20 µA PIN ASSIGNMENT (TOP VIEW) 54 PIN TSOP PIN NAMES A0~A17 Address Inputs CE Chip Enable R/W Read/Write Control OE Output Enable LB , UB Data Byte Control I/O1~I/O16 Data Inputs/Outputs VDD Power ( +5 V) GND Ground NC No Connection OP* Option *: OP pin must be open or connected to GND. • Access Times (maximum): TC55NEM216AFTN 55 70 Access Time 55 ns 70 ns CE Access Time 55 ns 70 ns OE Access Time 30 ns 35 ns • Package: TSOP II54-P-400-0.80 (Weight: g typ) NC A3 A2 A1 A0 I/O16 I/O15 VDD GND I/O14 I/O13 OP R/W I/O12 I/O11 GND VDD I/O10 I/O9 NC A17 A16 A15 A14 A13 A4 A5 A6 A7 NC I/O1 I/O2 VDD GND I/O3 I/O4 OP NC I/O5 I/O6 GND VDD I/O7 I/O8 A8 A9 A10 A11 A12 NC 1 54 2 53 3 52 4 51 5 50 6 49 7 48 8 47 9 46 10 45 11 44 12 43 13 42 14 41 15 40 16 39 17 38 18 37 19 36 20 35 21 34 22 33 23 32 24 31 25 30 26 29 27 28 CE OE UB LB |
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Description similaire - TC55NEM216AFTN55 |
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