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NTE992 Fiches technique(PDF) 2 Page - NTE Electronics |
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NTE992 Fiches technique(HTML) 2 Page - NTE Electronics |
2 / 3 page Electrical Characteristics (Cont’d): (TA = +25°C, VCC = +15V unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Slew Rate Positive Output Swing SR CL = 100pF, RL = 2kΩ – 0.5 – V/ µs Negative Output Swing – 20 – V/ µs Unity Gain Bandwidth BW – 4.0 – MHz Output Voltage Swing (Note 6) VOH VCC = +15V, Ω Vout High (Iin– = 0, Iin+ = 0 13.5 14.2 – V VOL RL = 2kΩ Vout Low (Iin– = 10µA, Iin+ = 0 – 0.03 0.2 V VOH VCC = Max Rating, RL = R, Vout High (Iin– = 0, Iin+ = 0) – 25.5 – V Output Current Source Isource 5.0 10.0 – mA Sink (Note 2) Isink 0.5 0.87 – mA Low Level Output Current IOL Iin– = 5µA, VOL = 1V – 5.0 – mA Supply Current (All Four Amps) Non–Inverting Inputs Open IDO – 6.9 10.0 mA Non–Inverting Inputs Grounded IDG – 7.8 14.0 mA Power Supply Rejection PSRR f = 100Hz – 55 – dB Mirror Gain Ai Iin+ = 20µA TA = –40° to +85°C, Note 3 0.90 1.0 1.1 µA Iin+ = 200µA 0.90 1.0 1.1 µA ∆ Mirror Gain ∆Ai 20 µA ≤ Iin+ ≤ 200µA, TA = –40° to +85°C, Note 3 – 2.0 5.0 % Mirror Current TA = –40° to +85°C – 10 500 µA Negative Input Current Note 5 – 1.0 – mA Note 2. Sink current is specified for linear operation. When the device is used as a comparator (non– linear operation) where the inverting input is overdriven, the sink current (low level output current) capability is typically 5mA. Note 3. This specification indicates the current gain of the current mirror which is used as the non– inverting input. Note 4. Input VBE match between the non–inverting and inverting inputs occurs for a mirror current (non–inverting input current) of approximately 10 µA. Note 5. Clamp transistors are included to prevent the input voltages from swinging below GND more than approximately –0.3V. The negative input currents that may result from large signal ov- erdrive with capacitance input coupling must be limited externally to values of approximately 1mA. Negative input currents in excess of 4mA will cause the output to drop to a low voltage. These values apply for any one of the input terminals. If more than one of the input terminals are simultaneously driven negative, maximum currents are reduced. Common–mode bias- ing can be used to prevent negative input voltages. Note 6. When used as a non–inverting amplifier, the minimum output voltage is the VBE of the invert- ing input transistor. |
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