Si5318

Rev. 1.0

9

Wander/Jitter at 3200 Hz Bandwidth

(BWSEL[1:0] = 01 and DBLBW = 1)

Jitter Tolerance (see Figure 7)

f = 32 Hz

500

—

—

ns

f = 320 Hz

50

—

—

ns

f = 3200 Hz

5

—

—

ns

CLKOUT RMS Jitter Generation

12 kHz to 20 MHz

—

0.72

0.9

ps

CLKOUT Peak-Peak Jitter Generation

12 kHz to 20 MHz

—

6.8

10.0

ps

Jitter Transfer Bandwidth (see Figure 6)

BW = 3200 Hz

—

3200

—

Hz

Wander/Jitter Transfer Peaking

< 3200 Hz

—

0.05

0.1

dB

Wander/Jitter at 3200 Hz Bandwidth

(BWSEL[1:0] = 00 and DBLBW = 0)

Jitter Tolerance (see Figure 7)

f= 32 Hz

1000

—

—ns

f= 320Hz

100

—

—ns

f = 3200 Hz

10

—

—ns

CLKOUT RMS Jitter Generation

12 kHz to 20 MHz

—

0.86

1.2

ps

CLKOUT Peak-Peak Jitter Generation

12 kHz to 20 MHz

—

7.7

10.0

ps

Jitter Transfer Bandwidth (see Figure 6)

BW = 3200 Hz

—

3200

—Hz

Wander/Jitter Transfer Peaking

< 3200 Hz

—

0.05

0.1

dB

Wander/Jitter at 6400 Hz Bandwidth

(BWSEL[1:0] = 00 and DBLBW = 1)

Jitter Tolerance (see Figure 7)

f = 64 Hz

500

—

—

ns

f= 640Hz

50

—

—

ns

f = 6400 Hz

5

—

—

ns

CLKOUT RMS Jitter Generation

12 kHz to 20 MHz

—

0.7

1.0

ps

CLKOUT Peak-Peak Jitter Generation

12 kHz to 20 MHz

—

6.6

9.0

ps

Jitter Transfer Bandwidth (see Figure 6)

BW = 6400 Hz

—

6400

—

Hz

Wander/Jitter Transfer Peaking

< 6400 Hz

—

0.05

0.1

dB

Table 4. AC Characteristics (PLL Performance Characteristics) (Continued)

Parameter

Symbol

Test Condition

Min

Typ

Max Unit

Notes:

1. Higher PLL bandwidth settings provide smaller clock output wander with temperature gradient.

2. For reliable device operation, temperature gradients should be limited to 10 °C/min.

3. Telcordia GR-1244-CORE requirements specify maximum phase transient slope during clock rearrangement in terms

of nanoseconds per millisecond. The equivalent ps/

µs unit is used here since the maximum phase transient magnitude

for the Si5318 (tPT_MTIE) never reaches one nanosecond.