S29PL127J datasheet(79/106 Pages) SPANSION

No de pièce	S29PL127J

Description	CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control

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79 / 106 page

April 7, 2005 31107A62

S29PL127J/S29PL129J/S29PL064J/S29PL032J

77

PRE L I M INARY

DQ2: Toggle Bit II

The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular

sector is actively erasing (that is, the Embedded Erase algorithm is in progress),

or whether that sector is erase-suspended. Toggle Bit II is valid after the rising

edge of the final WE# pulse in the command sequence.

DQ2 toggles when the system reads at addresses within those sectors that have

been selected for erasure. (The system may use either OE# or CE# (CE1# / CE2#

for PL129J) to control the read cycles.) But DQ2 cannot distinguish whether the

sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates

whether the device is actively erasing, or is in Erase Suspend, but cannot distin-

guish which sectors are selected for erasure. Thus, both status bits are required

for sector and mode information. Refer to Table 23 to compare outputs for DQ2

and DQ6.

Figure 7 shows the toggle bit algorithm in flowchart form, and the "DQ2: Toggle

Bit II" section explains the algorithm. See also the "DQ6: Toggle Bit I" section.

Figure 19 shows the toggle bit timing diagram. Figure 20 shows the differences

between DQ2 and DQ6 in graphical form.

Reading Toggle Bits DQ6/DQ2

Refer to Figure 7 for the following discussion. Whenever the system initially be-

gins reading toggle bit status, it must read DQ7–DQ0 at least twice in a row to

Note: The system should recheck the toggle bit even if DQ5 = “1” because the toggle

bit may stop toggling as DQ5 changes to “1.” See the "DQ6: Toggle Bit I" section and

"DQ2: Toggle Bit II" section for more information.

Figure 7. Toggle Bit Algorithm

START

No

Yes

DQ5 = 1?

No

Yes

Toggle Bit

= Toggle?

No

Program/Erase

Operation Not

Complete, Write

Reset Command

Program/Erase

Operation Complete

Toggle Bit

= Toggle?

Read Byte Twice

(DQ7–DQ0)

Address = VA

Read Byte

(DQ7–DQ0)

Address =VA

Read Byte

(DQ7–DQ0)

Address =VA

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