AM29PDL128G datasheet(4/69 Pages) SPANSION

No de pièce	AM29PDL128G

Description	128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIO Control

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Fabricant	SPANSION [SPANSION]

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4 / 69 page

July 29, 2002

Am29PDL128G

3

P R E L I M I NARY

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Simultaneous Operation Block Diagram . . . . . . . 6

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7

Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9

Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10

Table 1. Am29PDL128G Device Bus Operations ...........................10

Word/Double Word Configuration........................................... 10

Requirements for Reading Array Data ................................... 10

Random Read (Non-Page Read) ........................................... 10

Page Mode Read .................................................................... 11

Table 2. Page Select, Double Word Mode ......................................11

Table 3. Page Select, Word Mode ..................................................11

Simultaneous Operation ......................................................... 11

Table 4. Bank Select .......................................................................11

Writing Commands/Command Sequences ............................ 11

Accelerated Program Operation ............................................. 12

Autoselect Functions .............................................................. 12

Standby Mode ........................................................................ 12

Automatic Sleep Mode ........................................................... 12

RESET#: Hardware Reset Pin ............................................... 12

Output Disable Mode .............................................................. 12

Table 5. Sector Address Table ........................................................13

Table 6. SecSi

 Sector Addresses................................................20

Autoselect Mode..................................................................... 20

Table 7. Autoselect Codes (High Voltage Method) ........................20

Table 8. Sector Block Addresses for Protection/Unprotection ........21

Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . . 23

Persistent Sector Protection ................................................... 24

Persistent Protection Bit (PPB) ............................................... 24

Persistent Protection Bit Lock (PPB Lock) ............................. 24

Dynamic Protection Bit (DYB) ................................................ 24

Table 9. Sector Protection Schemes ...............................................25

Persistent Sector Protection Mode Locking Bit ...................... 25

Password Protection Mode ..................................................... 25

Password and Password Mode Locking Bit ........................... 25

64-bit Password ...................................................................... 26

Write Protect (WP#) ................................................................ 26

Persistent Protection Bit Lock ................................................. 26

High Voltage Sector Protection .............................................. 26

Figure 1. In-System Sector Protection/

Sector Unprotection Algorithms ...................................................... 27

Temporary Sector Unprotect .................................................. 28

Figure 2. Temporary Sector Unprotect Operation........................... 28

SecSi™ (Secured Silicon) Sector

Flash Memory Region ............................................................ 28

SecSi Sector Protection Bit .................................................... 29

Utilizing Password and SecSi Sector Concurrently ................ 29

Hardware Data Protection ...................................................... 29

Low VCC Write Inhibit ............................................................ 29

Write Pulse “Glitch” Protection ............................................... 29

Logical Inhibit .......................................................................... 29

Power-Up Write Inhibit ............................................................ 29

Common Flash Memory Interface (CFI) . . . . . . . 30

Table 10. CFI Query Identification String ............................ 30

Table 11. System Interface String................................................... 31

Table 12. Device Geometry Definition................................. 32

Table 13. Primary Vendor-Specific Extended Query........... 33

Command Definitions. . . . . . . . . . . . . . . . . . . . . . 34

Reading Array Data ................................................................ 34

Reset Command ..................................................................... 34

Autoselect Command Sequence ............................................ 34

Enter SecSi Sector/Exit SecSi Sector

Command Sequence .............................................................. 34

Double Word/Word Program Command Sequence ................ 35

Unlock Bypass Command Sequence ..................................... 35

Figure 3. Program Operation ......................................................... 36

Chip Erase Command Sequence ........................................... 36

Sector Erase Command Sequence ........................................ 36

Erase Suspend/Erase Resume Commands ........................... 37

Figure 4. Erase Operation.............................................................. 37

Password Program Command ................................................ 37

Password Verify Command .................................................... 38

Password Protection Mode Locking Bit Program Command .. 38

Persistent Sector Protection Mode Locking Bit Program

Command ............................................................................... 38

SecSi Sector Protection Bit Program Command .................... 38

PPB Lock Bit Set Command ................................................... 38

DYB Write Command ............................................................. 39

Password Unlock Command .................................................. 39

PPB Program Command ........................................................ 39

All PPB Erase Command ........................................................ 39

DYB Write Command ............................................................. 39

PPB Lock Bit Set Command ................................................... 40

PPB Lock Bit Status Command .............................................. 40

Sector Protection Status Command ....................................... 40

Command Definitions Tables.................................................. 41

Table 14. Memory Array Command Definitions (x32 Mode) .......... 41

Table 15. Sector Protection Command Definitions (x32 Mode) ..... 42

Table 16. Memory Array Command Definitions (x16 Mode) .......... 43

Table 17. Sector Protection Command Definitions (x16 Mode) ..... 44

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 45

DQ7: Data# Polling ................................................................. 45

Figure 5. Data# Polling Algorithm .................................................. 45

RY/BY#: Ready/Busy#............................................................ 46

DQ6: Toggle Bit I .................................................................... 46

Figure 6. Toggle Bit Algorithm........................................................ 46

DQ2: Toggle Bit II ................................................................... 47

Reading Toggle Bits DQ6/DQ2 ............................................... 47

DQ5: Exceeded Timing Limits ................................................ 47

DQ3: Sector Erase Timer ....................................................... 47

Table 18. Write Operation Status ................................................... 48

Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 49

Figure 7. Maximum Negative Overshoot Waveform ...................... 49

Figure 8. Maximum Positive Overshoot Waveform........................ 49

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 50

Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 9. Test Setup...................................................................... 51

Figure 10. Input Waveforms and Measurement Levels ................. 51

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 52

Read-Only Operations ........................................................... 52

Figure 11. Read Operation Timings ............................................... 52

Figure 12. Page Read Operation Timings...................................... 53

Numéro de pièce similaire - AM29PDL128G

Fabricant	No de pièce	Fiches technique	Description
Advanced Micro Devices	AM29PDL128G	628Kb / 71P	128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIOTM Control
	AM29PDL128G25PEE	628Kb / 71P	128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIOTM Control
	AM29PDL128G25PEEN	628Kb / 71P	128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIOTM Control
	AM29PDL128G25PEF	628Kb / 71P	128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIOTM Control
	AM29PDL128G25PEFN	628Kb / 71P	128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIOTM Control

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Description similaire - AM29PDL128G

Fabricant	No de pièce	Fiches technique	Description
Advanced Micro Devices	AM29PDL128G	628Kb / 71P	128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIOTM Control
SPANSION	AM75PDL191CHHA	2Mb / 129P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
	AM75PDL191CHH_0402	2Mb / 136P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
	AM75PDL191BHHA	1Mb / 129P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
	AM29PDLI27H	750Kb / 68P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control
	AM29PDL127H	991Kb / 68P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control
	S29JL032H	1Mb / 61P	32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
	AM29PDL640G	1Mb / 61P	64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control
Advanced Micro Devices	AM29PDL129H	841Kb / 49P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO
Advanced Micro Devices	AM29DL640G	1Mb / 52P	64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory

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