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HCF4029BM1 Fiches technique(PDF) 2 Page - STMicroelectronics |
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HCF4029BM1 Fiches technique(HTML) 2 Page - STMicroelectronics |
2 / 12 page HCF4029B 2/12 signal is normally high and the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY-IN signal is low. The CARRY-IN signal in the low state can thus be considered a CLOCK ENABLE. The CARRY-IN terminal must be connected to VSS when not in use. Binary counting is accomplished when the BINARY/DECODE input is high; the counter counts in the decade mode when the BINARY/DECADE input is low. The counter counts Up when to UP/DOWN INPUT is high, and Down when the UP/DOWN INPUT is low. Multiple packages can be connected in either a parallel clocking or a ripple clocking arrangement. Parallel clocking provides synchronous control and, hence, a faster response from all counting outputs. Ripple clocking allows for longer clock input rise and fall times. IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION FUNCTIONAL DIAGRAM PIN No SYMBOL NAME AND FUNCTION 15 CLOCK Clock Input 5 CARRY IN Carry In Input 9 BINARY/ DECADE Binary / Decade Select 10 UP/DOWN Up/Down Select 1 PRESET ENABLE Preset Enable Input 4, 12, 13, 3 JAM1 to JAM4 Jam Input Signals 6, 11, 14, 2 Q1 to Q4 Q Outputs 7 CARRY OUT Carry Out Outputs 8 VSS Negative Supply Voltage 16 VDD Positive Supply Voltage |
Numéro de pièce similaire - HCF4029BM1 |
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Description similaire - HCF4029BM1 |
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